Definition and test of dynamic parameters of the h

2022-08-22
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Definition and test of dynamic parameters of high-speed analog-to-digital converter

Table 1 dynamic parameter definition

untitled document dynamic parameter description signal-to-noise ratio (SNR) SNR db=6.02n+1.763 signal to noise + distortion ratio (SINAD) sinaddb=20log10 (asignal[rms]/anoise[rms]) significant digits (ENOB) enob= (sinad-1.763)/6.02 total harmonic offset (THD) thddbc=20log10 (√ (VHD · 2 + VHD · 32)+vhd · N 2)/v[fin] spurious free dynamic range (SFDR) Sfde is the ratio of the effective value of the fundamental wave amplitude of the signal to the effective value of the maximum harmonic component. In dB, the dual tone intermodulation distortion (ttimd) ttimdb=20log10{Σ (aimf-sum[rms]+aimf-diff[rms]/afu10. Hexanitrile: the range of a single set of devices reaches 50000 tons/year ndamental[rms]} multi tone intermodulation distortion (mtimd) mtimddb=20log10{Σ (aimf-sum[rms]+aimf-diff[rms]/afundamental[rms].The input contains multiple frequency components, voltage standing wave ratio (VSWR) VSWR (1+ ‖ ρ‖)/(1+‖ ρ‖),ρ— Reflection coefficient

circuit board layout and hardware requirements in the test scheme

in order to reasonably test the dynamic parameters of high-speed ADC, it is best to choose the circuit board pre assembled by the manufacturer or the circuit board layout recommended in the reference data manual. The layout of high-speed data converter requires the design skills of high-speed circuit, and the following basic rules should be generally observed:

· all bypass capacitors should be installed as close to the device as possible, It is better to be at the same level with ADC, and use surface mount components to minimize the lead and reduce parasitic inductance and capacitance

· analog power supply, digital power supply Two 0.1mF ceramic capacitors and one 2.2m capacitor are used for the reference power supply and input common terminal (f) bipolar capacitors are connected in parallel to the ground by-pass.

· multilayer circuit boards with independent ground plane and power plane are used to ensure the integrity of the signal.

· when using independent ground plane, the physical position of ADC analog ground and digital ground should be considered. The impedance between the two ground planes should be as low as possible, and the AC and DC voltage difference between them should be less than 0.3V to avoid device damage and deadlock. Analog ground and digital ground should be connected at a single point , low resistance meter can be used to paste resistance (1 Ω ~ 5 Ω), ferrite bead connection or direct short circuit to avoid the interference of digital ground current full of noise to analog ground

· if the analog ground is fully isolated from the digital ground, all grounding pins can also be placed on the same plane

· high speed digital signal lines should be far away from sensitive analog signal lines

· all signal lines should be as short as possible, And there is no 90 (corner).

· the clock input should be processed as an analog input signal, away from any analog input and digital signal.

selecting the appropriate test scheme and the correct test equipment is an important link to obtain the best parameters of the data converter. The hardware selection scheme proposed below is necessary for the test of high-speed ADC max1448, and ② the martenfort formula is effective

· DC power supply (Hewlett Packard e3620a, dual power supply V, a): provide independent power supply for analog and digital circuits. Each power supply must be able to provide 100mA driving current

· clock signal function generator (Hewlett Packard hp8662a): the clock input of the device under test receives a clock signal compatible with CMOS level. Because max1448 adopts a ten stage pipeline structure internally, and the inter stage conversion depends on the repeatability of the rising and falling edges of the external clock, a low jitter, fast rising/falling external clock signal is required. In particular, the sampling of this converter occurs on the falling edge of the clock signal, and the jitter of the falling edge should be minimized. Aperture jitter limits the SNR performance of ADC:

SNR DB = 20 · log10 (1/2 π · fin · Taj)

where fin is the analog input frequency and Taj is the aperture jitter time. Under sampling applications require more stringent clock jitter indicators

· input signal function generator (Hewlett Packard also has good heat resistance, chemical corrosion resistance, radiation resistance, electrical performance, flame retardant performance, etc. hp8662a):

in order to ensure normal operation, the two function generators (clock and input signal) must be phase locked

· logic analyzer in some fields and even at the world's advanced level - (Hewlett Packard hp16500c):

select the logic analyzer according to the sampling points required by FFT. For example, hp1663c has a data recording capacity of less than 4K, which can be used in this test

· analog band-pass filter (TTE elliptic function band-pass filter Q56 Series):

cut off frequency: 7.5MHz, 20MHz, 40MHz and 50MHz

· digital multimeter (DMM): used to check the reference, power supply and common mode voltage

· the evaluation board of the tested device

uses the external clock signal synchronous logic analyzer from the circuit board, and locks in the rising edge of the clock. When collecting data, the data can be stored on the data acquisition board, exchanged through the HPIB bus of the logic analyzer, or stored in the hard disk or floppy disk of the logic analyzer

the next thing to consider is the selection of appropriate software tools. The following software tools are selected for data acquisition and analysis:

* labwindows/cvi: establish a communication link between the logic analyzer and the data acquisition board for data acquisition

* Matlab: a software tool for FFT and dynamic parameter analysis of collected data. The source program can be obtained from Maxim Chinese station ()

the overall circuit block diagram for testing is shown in Figure 1

power spectrum, frequency resolution, spectrum leakage and window function

fast Fourier transform (FFT) and power spectrum are very useful tools in analyzing and measuring the collected data records. With these tools, we can effectively collect time-domain signals, determine their spectral components, and display the results

power spectrum (refer to the sampling procedure) on the frequency axis(

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